High-voltage metal-oxide-semiconductor (HVMOS) transistors are widely used in many electrical devices, such as CPU power supplies, power management systems, AC/DC converters, etc.
FIG. 1 illustrates a conventional HVPMOS 2. The HVPMOS 2 includes a gate electrode 10, a gate oxide 12, a drain region 4 in a high-voltage p-well 16, and a source region 6 in a high-voltage n-well 14. A shallow trench isolation (STI) region 8 isolates the drain region 4 and gate electrode 10 so that a high drain-gate voltage can be applied. An N+ region 18 is typically formed adjacent the source region 6.
The conventional HVPMOS 2 suffers from electrostatic discharge (ESD). As is known in the art, a high potential may be generated to an input or output buffer of an integrated circuit, which may be caused by a person simply touching a package pin. When the electrostatic is discharged, a high current is produced through devices of the integrated circuit. Electrostatic discharge (ESD) is a serious problem for semiconductor devices since it has the potential to destroy the device and the entire integrated circuit. The HVPMOS 2 can sustain forward mode ESD. When a forward mode ESD transient occurs, causing the voltage at the drain region 4 to be higher than the voltage at the source region 6, an ESD current flows through the drain region 4, high-voltage p-well 16, high-voltage n-well 14, and N+ region 18, and is discharged. The HVPMOS 2 thus will not be damaged.
A reverse mode ESD, however, may damage the HVPMOS 2. When an ESD occurs at the source region 6 (and N+ region 18), a reversed diode between the high-voltage n-well 14 and high-voltage p-well 16 prevents ESD current from being conducted. As a result, the HVPMOS 2 or other neighboring devices will be damaged. One way of solving this problem is to form separate ESD protection devices to conduct ESD current and lower the voltage at the source region 6. However, extra cost and chip area are involved.
The preferred embodiments of the present invention provide a novel HVPMOS that is robust against both forward and reverse mode ESD.